drawer – Mainframe, Performance, Topics

Engineering – Part 8 – Remote Access Detection

The fact we’re up to “Part 8” illustrates there’s a lot to talk about once you take performance analysis down to the individual logical / physical processor level. Many people have talked about the need to avoid LPARs crossing processor drawer boundaries. There are good reasons for this – because access to cache or memoryContinue reading “Engineering – Part 8 – Remote Access Detection”

Drawers And More

Late last year I wrote a blog post: Drawers, Of Course. I’ll admit I’d half forgotten about it. Now that a few months have passed it’s time to write about at least part of it again. So why write about it again now? I’ve so much more experience with the instrumentation I described in thatContinue reading “Drawers And More”

Drawers, Of Course

This post is about processor drawers and how the topic might influence your LPAR design. Introduction Once upon a time drawers and books were very simple. If you wanted a certain number of processors – whether GCP, zIIP, zAAP, IFL, or ICF – that determined the number of drawers you had. (I’m still hearing peopleContinue reading “Drawers, Of Course”