Wouldn’t you like to know where in the machine an LPAR’s memory is? Perhaps not but for some customers it’s more than a matter of idle curiosity. The good news is that RMF will be able to tell you: A recent APAR for z/OS 3.2 Data Gatherer OA68545 exploits information from z17 processors to provideContinue reading “Memories Are Made Of This”
Tag Archives: performance
Mind The Gap
Or “An Indecent Interval”? I’ve written about RMF intervals before – when writing about System Recovery Boost. I suppose one lesson of this post is to not assume that all intervals are of equal length. We’ve got pretty used to assuming that a system’s RMF interval is, say, 15 minutes long. We’ve maybe got usedContinue reading “Mind The Gap”
Product CPU Usage – A Sometimes Useful Metric
It’s possible I’ve written about this before. If so it’s been a while. What I certainly have written about in the past is the SMF 30 Usage Data Section. I will have described how it can be used to describe architectural attributes of an address space or batch job. For example: (I probably shouldn’t goContinue reading “Product CPU Usage – A Sometimes Useful Metric”
Prepare To Evacuate
It is rare to need to evacuate hardware. But being rare is not an excuse to neglect to plan for it. Obviously I’ve been sensitised to the question by real customer situations – though I don’t intend to describe the situations in any detail; This post should prove useful enough without doing that. When IContinue reading “Prepare To Evacuate”
What’s Important? CICS Transaction vs Region Goals
When assessing how well a WLM policy protects key work it’s necessary to understand how much CPU is used at each importance level. \ If there is very little work at a lower importance (higher importance number) a CPU crunch will leave work at this importance level vulnerable to CPU queuing. Let me give aContinue reading “What’s Important? CICS Transaction vs Region Goals”
Remember Memory
In Engineering – Part 8 – Remote Access Detection I talked about reasons why LPARs might go cross-drawer. One reason I didn’t give was about memory. (I should perhaps remind you that on modern machines a logical processor accessing Level 4 Cache or memory in another processor drawer incurs a significant performance penalty, showing upContinue reading “Remember Memory”
Two Of These Are Not Like The Others
They were simpler times back then. “Back when?” You might ask. When PR/SM got started – in the mid 1980’s – a machine might have two or three LPARs. Similarly, when Parallel Sysplex got started the number of members was very small. For reference, a z17 ME1 can have up to 85 LPARs, and aContinue reading “Two Of These Are Not Like The Others”
Modern Machines, Modern Metrics
Modern Machines, Modern Metrics In z17 Sustainability Metrics – Part 0 I wrote about the new z17 Sustainability Metrics, or “Power Consumption”, if you prefer. This post isn’t part 1 – as I don’t intend to go into much detail about what I’ve learnt so far. I have learnt things, of course. During the SummerContinue reading “Modern Machines, Modern Metrics”
z17 Sustainability Metrics – Part 0
I call this “Part 0” because I haven’t yet seen any data. However I think it useful to start here, rather than waiting for customer data to appear – for two reasons: Sharing what data is available is useful. Showing how “folklore” is built is instructive and useful. As you might expect, I’ve been downContinue reading “z17 Sustainability Metrics – Part 0”
Mainframe Performance Topics Podcast Episode 36 “Telum Like It Is”
We were especially keen to get a podcast episode out on the day z17 was announced, having both worked on the launch project in various capacities. So, for once there was a deadline – which we actually made. It was a pleasure to record this, with almost every piece of it related to z17. SoContinue reading “Mainframe Performance Topics Podcast Episode 36 “Telum Like It Is””
Mainframe, Performance, Topics 